Introduction to High Performance Computing
25/02/2010 Thursday 25th February 2010, 15:00 (Room P12, Mathematics Building)
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Jose R. Herrero, Universitat Politecnica de Catalunya (Spain)
Computing systems have evolved rapidly and continuously for decades offering high computational potential and becoming ubiquitous. At the same time, current systems are very complex and can only be fully exploited with great knowledge of the algorithm, the architecture and the programming model. Assuming an audience with great knowledge on different kinds of algorithms, in this talk we will provide an overview of the computer architecture and some programming models, and how we may need to develop new algorithms in search for high performance. - We will introduce the memory hierarchy and the concept of locality together with some techniques to exploit them. - We will describe different levels of parallelism and clarify terms such as: latency, throughput, Pipelined processor, Super-scalar processor, Vector units, Multi-threading, [Homogeneous or Heterogeneous] Multi-core, Many-core, Shared Memory, Distributed memory or Distributed Shared Memory; and acronyms such as: SIMD, SIMT, MIMD, SSE, SMT, Hyper-threading, SMP, DM, DSM. - We will see the reasons which have driven the shift to multi-core processors and why that increases the burden on the software side. - We will comment on some available Programming Models. - We will then discuss the possibility to rethink our algorithms and/or data structures to better exploit the available hardware resources with some examples from linear algebra software: Data storage formats; Iterative refinement; Tiled algorithms.
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